One problem that arises with static CMOS circuits is the difficulty implementing high fan-in logic due to the body effect and other device characteristics. This problem may be solved by multiple logic stages. However, this often adversely affects the speed of the logic function. To help with the speed problem, the high fan-in logic could be implemented using a dynamic circuit. Unfortunately, this requires that the entire logic cone preceding the latch be implemented with dynamic circuits resulting in power and noise issues. It is also possible to feed static logic into dynamic circuits, but that requires difficult timing budgets to meet the setup and hold requirements of dynamic logic. Finally, pseudo-NMOS gates can be used to implement the high fan-in logic but these have power dissipation issues.